3D Heterogenous-Integrated RFICs for the Next-Generation Phased Array — NSF Award to University of California-Berkeley (CA, $595,0
The three-dimensional vertically integrated circuit (3D IC) has emerged as a key technology for extending the trajectory of Moore’s Law by increasing transistor density and circuit functionality through 3D chip stacking. In addition to the benefits of scaling, the 3D IC technology enables heterogeneous integration, all
| Award title | 3D Heterogenous-Integrated RFICs for the Next-Generation Phased Array |
|---|---|
| Award ID | 2532205 |
| Awardee | University of California-Berkeley |
| City | BERKELEY |
| State | CA |
| Amount obligated | $595,000 |
| Principal investigator | Jun-Chau Chien |
| Program | CSCS: Circuits and Systems for |
| Start date | 10/01/2025 |
| Abstract | The three-dimensional vertically integrated circuit (3D IC) has emerged as a key technology for extending the trajectory of Moore’s Law by increasing transistor density and circuit functionality through 3D chip stacking. In addition to the benefits of scaling, the 3D IC technology enables heterogeneous integration, allowing different chipsets fabricated by different semiconductor technologies to be combined for optimal performance and cost reduction. This approach holds a significant promise for |
| Source | NSF Awards |
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