SBIR Phase I: RISC-V and FPGA Pipeline-Coupled Heterogeneous Compute Microprocessor Archit — NSF Award to AXPRO SEMI (CA, $275,000
The broader impact of this Small Business Innovation Research (SBIR) Phase I project is to develop economical, green, and powerful computers for a hyperconnected, intelligent world. These scalable computers, from wearables to cloud-based systems, will revolutionize traditional computing, making artificial intelligence
| Award title | SBIR Phase I: RISC-V and FPGA Pipeline-Coupled Heterogeneous Compute Microprocessor Archit |
|---|---|
| Award ID | 2403483 |
| Awardee | AXPRO SEMI |
| City | SUNNYVALE |
| State | CA |
| Amount obligated | $275,000 |
| Principal investigator | Raminda Madurawe |
| Program | SBIR Phase I |
| Start date | 09/01/2024 |
| Abstract | The broader impact of this Small Business Innovation Research (SBIR) Phase I project is to develop economical, green, and powerful computers for a hyperconnected, intelligent world. These scalable computers, from wearables to cloud-based systems, will revolutionize traditional computing, making artificial intelligence (AI), machine learning (ML), blockchain, cryptocurrency, and big data more affordable and sustainable. The ongoing data explosion requires smart, instantly-analyzed, handheld, batt |
| Source | NSF Awards |
$799/mo
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