SHF: CSR: Medium: Practical and Efficient Accelerators with High-Frequency Chiplets — NSF Award to University of California-Santa
Modern computer chip design faces a critical bottleneck: creating high-performance hardware accelerators requires countless manual iterations and expert-years of development time. This project addresses a national priority by developing automated Artificial Intelligence (AI) systems that can design high-frequency chips
| Award title | SHF: CSR: Medium: Practical and Efficient Accelerators with High-Frequency Chiplets |
|---|---|
| Award ID | 2504580 |
| Awardee | University of California-Santa Cruz |
| City | SANTA CRUZ |
| State | CA |
| Amount obligated | $1,000,000 |
| Principal investigator | Jose Renau |
| Program | Software & Hardware Foundation |
| Start date | 07/15/2025 |
| Abstract | Modern computer chip design faces a critical bottleneck: creating high-performance hardware accelerators requires countless manual iterations and expert-years of development time. This project addresses a national priority by developing automated Artificial Intelligence (AI) systems that can design high-frequency chips with minimal human intervention. The research focuses on Zero Knowledge Proof (ZKP) accelerators, a cutting-edge cryptographic technology that allows users to prove possession of |
| Source | NSF Awards |
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